1. Field of the Invention
The present invention relates to a synchronous data communication receiver and the apparatus required to obtain clock synchronization.
2. Prior Art
The need for having a clock signal for use with encoded information is explained in U.S. Pat. No. 3,238,462 issued Mar. 1, 1966 and entitled "Synchronous Clock Pulse Generator", the disclosure of which is hereby incorporated by reference.
With respect to prior art relating to a synchronous communication receiver, decoding starts with the extraction of a timing signal and reconstructing a clock signal. One method to accomplish this is to use the waveform edges of the signal to trigger one-shot response circuits. Noise displaced crossings induce trigger problems with this scheme. Another scheme is to use the waveform edges to trigger an astable multivibrator or a phase-lock loop clock. However, noise still introduces multiple crossings and produces timing jitter. If the free-running clock frequency differs from the incoming data rate then a phase error will occur and will increase with the time between transitions. That is, the phase error, delta .theta., over the free-running time "T" in radians is: EQU delta .theta.=2.pi. (delta F) (T) EQU delta F=Fd=Fc/N
where:
N number of bit clock periods/data cell PA1 Fd is the data symbol frequency PA1 Fc is the clock oscillator frequency
The stability of the oscillator is dependent on the maximum allowable phase error. One implementation of the oscillator is using a multivibrator which is an analog device and suffers from external timing component selection and frequency drifting. An alternative implementation of the oscillator is to use a stable reference clock, such as a crystal generator, and a frequency divider. Operating the clock at an integer multiplier of the data symbol rate produces clock pulses each differing by a small fixed phase shift. The synchronization logic selects the clock whose phase is most closely matched to the data transition timing. Nevertheless, an integer multiple or discrete phase error will exist between the synchronized clock signal and the date symbol rate.
A received signal with interfering noise produces a synchronization clock with noise induced jitter. The effect of noise on timing jitter can be studied by looking at the noise signal near the limiter threshold level. If a signal, with a finite rate of change near the threshold level, has a noise sample amplitude of delta V which occurred at time "T1 minus delta-T", it will displace the zero crossing by "minus delta T" time.
A reduction in timing jitter may be accomplished by passing the signal through a bandpass filter tuned to the frequency of the data symbol rate. A limiter following the filter will eliminate the amplitude variations so that only perturbation of phase remain. These phase variations represent the timing jitter. However, any improvement in jitter performance results in a longer synchronization period or acquisition time. This is one of the problems this invention overcomes.
When the noise signal level becomes a significant fraction of the data signal level, then multiple zero crossings can occur and the timing signals become useless. This thresholding effect is a function of the signal to noise ratio and is characteristic of synchronization circuits. In the end, a trade off must be made between an acceptable jitter performance and the time necessary to acquire synchronization.
Ideally, time information or the reconstruction of a clock should be extracted from the power or the energy within the waveform instead of from the leading and trailing edges of the signal. Internal bit phase variations should not affect the correlation function of the decoder. The use of proper bandpass filters should not increase the bit synchronization acquistion time. Noise may be described by the distribution of noise power to frequency or the power spectrum. The input power to the receiver is characterized by: EQU (S(t)+N(t)).sup.2 =S(t).sup.2 +2S(t)N(t)+N(t).sup.2
where:
S(t)=input signal
N(t)=input noise
If the noise is small compared to the signal, then the product S(t) N(t), which is the signal to noise term, introduces noise terms at the sum and difference frequencies of the signal and noise. A bandpass filter tuned to the signal's characteristic frequency will see only terms which are in the vicinity of the delta-F band of that filter. The bandpass filter has an equivalent noise bandwidth Bn. If the delta-F is small, that is to say the bandpass filter is narrow, then the spectral noise power input to the decoder can be reduced.
In the prior art of synchronous digital communications these methods have been employed for obtaining bit synchronization and in reducing noise induced timing jitter. These designs require that the receiver will synchronize with a known data rate. This rate is used in the design to determine the local oscillator frequency of operation.